PB'12 competition: satisfaction and optimization track: results by benchmark

Results by benchmark for category optimisation, small integers, linear constraints (OPT-SMALLINT-LIN), subcategory Handmade, subsubcategory Synthesis PTL/CMOS Circuits

This page displays the results of the different solvers for each benchmark for category optimisation, small integers, linear constraints (OPT-SMALLINT-LIN), subcategory Handmade, subsubcategory Synthesis PTL/CMOS Circuits

REMINDER

Keep in mind that the 'Best result' columns only provide the best result given by one of the solvers. This 'Best result' may be wrong in case of an UNSATISFIABLE or OPTIMUM FOUND answer (because there's no efficient way to check these answers).

Description of a cell contents:

Cell exampleMeaning
AnswerSolver result
f=...value of the objective function for the model reported by the solver
TT=...Total Time (TT): this is the CPU time (in seconds) used by the solver until termination. This time is only meaningful for complete solvers because incomplete solvers will always run until they time out
Remember that CPU time and wall clock time are two very different notions. The CPU time represents the time during which the instructions of the solver were executed by the processor. The wall clock time represents how much time ellapsed on the clock. For a same event, the CPU time may be either smaller or greater than the wall clock time depending on the number of threads of execution and the number of processors.

Meaning of some abbreviations:

AbbreviationMeaning
f=...Value of the objective function
TOTime Out
MOMem. Out (out of memory)

Meaning of the different colors:

ColorMeaning
textthe solver cannot handle this instance
textthe solver gave no answer
textthe solver could give an answer (SAT)
textthe solver gave a definitive answer (OPTIMUM FOUND or UNSAT)
textthe solver performed better than the other ones on that instance (complete solvers point of view)
textthe solver performed better than the other ones on that instance (incomplete solvers point of view)
textthe solver was ended by a signal or other problem
textthe solver gave an incomplete answer
textthe solver gave a wrong answer

For better readability, you may choose to hide some solvers:
bsolo 3.2 (complete)
clasp 2.0.6-R5325 (opt) (complete)
npSolver 1.0 (complete)
npSolver 1.0 (fixed) (complete)
npSolver inc (complete)
npSolver inc (fixed) (complete)
npSolver inc-topDown (complete)
npSolver inc-topDown (fixed) (complete)
npSolver inc-topdown-quickBound (complete)
npSolver inc-topdown-quickBound (fixed) (complete)
PB07: bsolo 3.0.17 (complete)
PB07: minisat+ 1.14 (complete)
PB07: PB-clasp 2007-04-10 (complete)
PB07: Pueblo 1.4 (incomplete)
PB07: SAT4JPseudoResolution 2007-03-23 (complete)
PB09: bsolo 3.1 (complete)
PB09: SAT4J Pseudo Resolution 2.1.1 (complete)
PB09: SCIPspx SCIP 1.1.0.7 with SoPLEX 1.4.1(24.4.2009) (complete)
PB10: pb_cplex 2010-06-29 (complete)
PB10: SAT4J PB RES // CP 2.2.0 2010-05-31 (complete)
PB10: SCIPspx SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)
PB11: Sat4j Res//CP 2.3.0 (complete)
PB11: SCIP spx E_2 2011-06-10 (fixed) (complete)
PB12: minisatp 1.0-2-g022594c (complete)
pb2sat 2012-05-19 (complete)
pb2satCp2 2012-05-19 (complete)
pwbo 2.0 (complete)
pwbo 2.02 (complete)
SAT 4j PB RES // CP 2.3.2 Snapshot (complete)
Sat 4j PB Resolution 2.3.2 Snapshot (complete)
SAT4J PB specific settings 2.3.2 snapshot (complete)
SCIP spx SCIP 2.1.1.4. with SoPlex 1.6.0.3 fixed (complete)
SCIP spx E SCIP 2.1.1.4. Exp with SoPlex 1.6.0.3 fixed (complete)
SCIP spx standard SCIP 2.1.1.4. with SoPlex 1.6.0.3 standard fixed (complete)
toysat 2012-05-17 (complete)
toysat 2012-06-01 (complete)
wbo 1.7 (complete)
wbo 1.72 (complete)

Bench nameBest results
on this
instance		bsolo
3.2
(complete)		clasp
2.0.6-R5325 (opt)
(complete)		npSolver
1.0
(complete)		npSolver
1.0 (fixed)
(complete)		npSolver
inc
(complete)		npSolver
inc (fixed)
(complete)		npSolver
inc-topDown
(complete)		npSolver
inc-topDown (fixed)
(complete)		npSolver
inc-topdown-quickBound
(complete)		npSolver
inc-topdown-quickBound (fixed)
(complete)		PB07: bsolo
3.0.17
(complete)		PB07: minisat+
1.14
(complete)		PB07: PB-clasp
2007-04-10
(complete)		PB07: Pueblo
1.4
(incomplete)		PB07: SAT4JPseudoResolution
2007-03-23
(complete)		PB09: bsolo
3.1
(complete)		PB09: SAT4J Pseudo Resolution
2.1.1
(complete)		PB09: SCIPspx
SCIP 1.1.0.7 with SoPLEX 1.4.1(24.4.2009)
(complete)		PB10: pb_cplex
2010-06-29
(complete)		PB10: SAT4J PB RES // CP
2.2.0 2010-05-31
(complete)		PB10: SCIPspx
SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver
(complete)		PB11: Sat4j Res//CP
2.3.0
(complete)		PB11: SCIP spx E_2
2011-06-10 (fixed)
(complete)		PB12: minisatp
1.0-2-g022594c
(complete)		pb2sat
2012-05-19
(complete)		pb2satCp2
2012-05-19
(complete)		pwbo
2.0
(complete)		pwbo
2.02
(complete)		SAT 4j PB RES // CP
2.3.2 Snapshot
(complete)		Sat 4j PB Resolution
2.3.2 Snapshot
(complete)		SAT4J PB specific settings
2.3.2 snapshot
(complete)		SCIP spx
SCIP 2.1.1.4. with SoPlex 1.6.0.3 fixed
(complete)		SCIP spx E
SCIP 2.1.1.4. Exp with SoPlex 1.6.0.3 fixed
(complete)		SCIP spx standard
SCIP 2.1.1.4. with SoPlex 1.6.0.3 standard fixed
(complete)		toysat
2012-05-17
(complete)		toysat
2012-06-01
(complete)		wbo
1.7
(complete)		wbo
1.72
(complete)
normalized-PB06/OPT-SMALLINT/
submitted-PB05/manquinho/
synthesis-ptl-cmos-circuits/normalized-9symml.opb 		OPT
f=4517
TT=0.175
T1=0.17
 SAT
f=4742
TT=1798
T1=1722.71
 SAT (TO)
f=5118
TT=1800.02
T1=288.84
 ? (TO)

TT=1800.08

 ? (TO)

TT=1800.07

 ? (TO)

TT=1800.07

 ? (TO)

TT=1800.06

 ? (TO)

TT=1800.07

 ? (TO)

TT=1800.07

 ? (TO)

TT=1800.12

 ? (TO)

TT=1800.11

 OPT
f=4517
TT=75.854
T1=75.44
 SAT (TO)
f=5105
TT=1800.1
T1=1213.09
 SAT (TO)
f=7054
TT=1802.06
T1=1.19
 SAT
f=5274
TT=1783
T1=19.86
 ? (exit code)

TT=261.16

 SAT
f=4738
TT=1798
T1=1759.87
 ? (exit code)

TT=711.8

 OPT
f=4517
TT=1.941
T1=1.43
 OPT
f=4517
TT=0.175
T1=0.17
 SAT (TO)
f=5301
TT=1800.01
T1=590.95
 OPT
f=4517
TT=1.322
T1=1.31
 SAT (TO)
f=5352
TT=1800.59
T1=888.41
 OPT
f=4517
TT=2.685
T1=2.67
 SAT (TO)
f=4978
TT=1800.1
T1=1800.61
 ? (TO)

TT=1800.07

 ? (TO)

TT=1800.03

 SAT (TO)
f=5147
TT=1800.09
T1=900.31
 SAT (TO)
f=5048
TT=1800.1
T1=900.31
 SAT (TO)
f=5616
TT=1800.56
T1=103.57
 SAT (TO)
f=5987
TT=1800.85
T1=0.36
 SAT (TO)
f=6200
TT=1800.04
T1=1442.34
 OPT
f=4517
TT=1.505
T1=1.49
 OPT
f=4517
TT=1.422
T1=1.52
 OPT
f=4517
TT=1.447
T1=1.43
 ? (TO)

TT=1800.02

 ? (TO)

TT=1800.09

 ?

TT=1799.9

 ?

TT=1799.59
normalized-PB06/OPT-SMALLINT/
submitted-PB05/manquinho/
synthesis-ptl-cmos-circuits/normalized-b1.opb 		OPT
f=128
TT=0.001
T1=0
 OPT
f=128
TT=0.001
T1=0
 OPT
f=128
TT=0.002
T1=0
 OPT
f=128
TT=0.089
T1=0.05
 OPT
f=128
TT=0.127
T1=0.02
 OPT
f=128
TT=0.037
T1=0.02
 OPT
f=128
TT=0.053
T1=0.01
 OPT
f=128
TT=0.022
T1=0.02
 OPT
f=128
TT=0.026
T1=0.01
 OPT
f=128
TT=0.037
T1=0.03
 OPT
f=128
TT=0.035
T1=0.01
 OPT
f=128
TT=0.002
T1=0
 OPT
f=128
TT=0.005
T1=0
 OPT
f=128
TT=0.083
T1=0.08
 OPT
f=128
TT=0.005
T1=0
 OPT
f=128
TT=0.114
T1=0.12
 OPT
f=128
TT=0.001
T1=0
 OPT
f=128
TT=0.169
T1=0.14
 OPT
f=128
TT=0.016
T1=0.01
 OPT
f=128
TT=0.005
T1=0
 OPT
f=128
TT=0.183
T1=3.14
 OPT
f=128
TT=0.015
T1=0.01
 OPT
f=128
TT=0.173
T1=1.64
 OPT
f=128
TT=0.018
T1=0.01
 OPT
f=128
TT=0.003
T1=0
 OPT
f=128
TT=0.056
T1=0.03
 OPT
f=128
TT=0.064
T1=0.05
 OPT
f=128
TT=0.002
T1=0
 OPT
f=128
TT=0.001
T1=0
 OPT
f=128
TT=0.174
T1=1.65
 OPT
f=128
TT=0.167
T1=0.14
 OPT
f=128
TT=0.176
T1=0.14
 OPT
f=128
TT=0.021
T1=0.01
 OPT
f=128
TT=0.016
T1=0.01
 OPT
f=128
TT=0.02
T1=0.01
 OPT
f=128
TT=0.004
T1=0
 OPT
f=128
TT=0.004
T1=0
 OPT
f=128
TT=0.001
T1=0
 OPT
f=128
TT=0.002
T1=0
normalized-PB06/OPT-SMALLINT/
submitted-PB05/manquinho/
synthesis-ptl-cmos-circuits/normalized-C17.opb 		OPT
f=260
TT=0.001
T1=0
 OPT
f=260
TT=0.001
T1=0
 OPT
f=260
TT=0.001
T1=0
 OPT
f=260
TT=0.08
T1=0.07
 OPT
f=260
TT=0.105
T1=0.1
 OPT
f=260
TT=0.037
T1=0.03
 OPT
f=260
TT=0.047
T1=0.04
 OPT
f=260
TT=0.02
T1=0.02
 OPT
f=260
TT=0.032
T1=0.03
 OPT
f=260
TT=0.028
T1=0.03
 OPT
f=260
TT=0.041
T1=0.04
 OPT
f=260
TT=0.001
T1=0
 OPT
f=260
TT=0.002
T1=0
 OPT
f=260
TT=0.047
T1=0.03
 OPT
f=260
TT=0.001
T1=0
 OPT
f=260
TT=0.114
T1=0.13
 OPT
f=260
TT=0.001
T1=0
 OPT
f=260
TT=0.167
T1=0.14
 OPT
f=260
TT=0.015
T1=0.01
 OPT
f=260
TT=0.004
T1=0
 OPT
f=260
TT=0.166
T1=2.13
 OPT
f=260
TT=0.014
T1=0.01
 OPT
f=260
TT=0.175
T1=1.16
 OPT
f=260
TT=0.017
T1=0.01
 OPT
f=260
TT=0.003
T1=0
 OPT
f=260
TT=0.037
T1=0.03
 OPT
f=260
TT=0.02
T1=0.01
 OPT
f=260
TT=0.001
T1=0
 OPT
f=260
TT=0.002
T1=0
 OPT
f=260
TT=0.163
T1=1.13
 OPT
f=260
TT=0.145
T1=0.13
 OPT
f=260
TT=0.172
T1=0.14
 OPT
f=260
TT=0.014
T1=0.01
 OPT
f=260
TT=0.015
T1=0.01
 OPT
f=260
TT=0.016
T1=0.01
 OPT
f=260
TT=0.003
T1=0
 OPT
f=260
TT=0.002
T1=0
 OPT
f=260
TT=0.002
T1=0
 OPT
f=260
TT=0.003
T1=0
normalized-PB06/OPT-SMALLINT/
submitted-PB05/manquinho/
synthesis-ptl-cmos-circuits/normalized-C432.opb 		OPT
f=4822
TT=0.236
T1=0.23
 SAT
f=5427
TT=1798.01
T1=1794.45
 SAT (TO)
f=5669
TT=1800.02
T1=1584.1
 ? (TO)

TT=1800.03

 ? (TO)

TT=1800.06

 ? (TO)

TT=1800.03

 ? (TO)

TT=1800.06

 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.06

 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.12

 OPT
f=4822
TT=57.695
T1=40.99
 SAT (TO)
f=6251
TT=1800.06
T1=418.06
 SAT (TO)
f=6921
TT=1800.16
T1=0.42
 SAT
f=5610
TT=1783
T1=0.04
 ? (exit code)

TT=539.9

 SAT
f=5435
TT=1798
T1=329.9
 SAT
f=6956
TT=848.546
T1=0.37
 OPT
f=4822
TT=1.828
T1=1.81
 OPT
f=4822
TT=0.236
T1=0.23
 SAT (TO)
f=6096
TT=1800.17
T1=398.05
 OPT
f=4822
TT=2.574
T1=2.56
 SAT (TO)
f=5929
TT=1800.99
T1=289.05
 OPT
f=4822
TT=1.463
T1=1.44
 SAT (TO)
f=6287
TT=1800.05
T1=1800.61
 ? (TO)

TT=1800.13

 ? (TO)

TT=1800.01

 SAT (TO)
f=5819
TT=1800.11
T1=900.31
 SAT (TO)
f=5762
TT=1800.13
T1=900.31
 SAT (TO)
f=6744
TT=1800.46
T1=659.7
 SAT (TO)
f=6956
TT=1800.05
T1=0.37
 SAT (TO)
f=6912
TT=1659.74
T1=876.76
 OPT
f=4822
TT=3.772
T1=3.75
 OPT
f=4822
TT=3.641
T1=3.63
 OPT
f=4822
TT=3.234
T1=1.41
 ? (TO)

TT=1800.08

 ? (TO)

TT=1800.07

 ?

TT=1799.93

 ?

TT=1799.6
normalized-PB06/OPT-SMALLINT/
submitted-PB05/manquinho/
synthesis-ptl-cmos-circuits/normalized-c8.opb 		OPT
f=1194
TT=0.034
T1=0.03
 OPT
f=1194
TT=0.401
T1=0.38
 SAT (TO)
f=1302
TT=1800.03
T1=1448.1
 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.11

 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.11

 ? (TO)

TT=1800.05

 ? (TO)

TT=1800.07

 ? (TO)

TT=1800.05

 OPT
f=1194
TT=0.056
T1=0.04
 SAT (TO)
f=1301
TT=1800.04
T1=1766.27
 SAT (TO)
f=1569
TT=1802.05
T1=575.99
 SAT
f=1309
TT=1783.01
T1=557.1
 SAT (TO)
f=1569
TT=1800.1
T1=1.24
 OPT
f=1194
TT=0.399
T1=0.37
 SAT
f=1560
TT=963.389
T1=211.3
 OPT
f=1194
TT=0.089
T1=0.08
 OPT
f=1194
TT=0.034
T1=0.03
 SAT (TO)
f=1380
TT=1800.5
T1=303.94
 OPT
f=1194
TT=0.088
T1=0.08
 SAT (TO)
f=1334
TT=1800.35
T1=449.53
 OPT
f=1194
TT=0.122
T1=0.11
 SAT (TO)
f=1310
TT=1800.04
T1=1800.4
 ? (TO)

TT=1800.07

 ? (TO)

TT=1800.04

 OPT
f=1194
TT=79.882
T1=39.94
 OPT
f=1194
TT=565.04
T1=282.62
 SAT (TO)
f=1396
TT=1800.03
T1=568.71
 SAT (TO)
f=1556
TT=1800.08
T1=0.37
 SAT (TO)
f=1649
TT=1800.01
T1=1095.74
 OPT
f=1194
TT=0.16
T1=0.15
 OPT
f=1194
TT=0.151
T1=0.14
 OPT
f=1194
TT=0.351
T1=0.32
 ? (TO)

TT=1800.03

 ? (TO)

TT=1800.02

 OPT
f=1194
TT=47.577
T1=47.59
 OPT
f=1194
TT=44.77
T1=44.84
normalized-PB06/OPT-SMALLINT/
submitted-PB05/manquinho/
synthesis-ptl-cmos-circuits/normalized-cc.opb 		OPT
f=1567
TT=0.016
T1=0.01
 OPT
f=1567
TT=0.201
T1=0.19
 SAT (TO)
f=1567
TT=1800.03
T1=645.68
 ? (TO)

TT=1800.12

 ? (TO)

TT=1800.12

 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.12

 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.06

 ? (TO)

TT=1800.12

 ? (TO)

TT=1800.06

 OPT
f=1567
TT=0.024
T1=0.01
 SAT (TO)
f=1631
TT=1800.02
T1=1107.04
 SAT (TO)
f=1752
TT=1802.11
T1=0.6
 SAT
f=1584
TT=1783
T1=1138.27
 SAT (TO)
f=1625
TT=1800.65
T1=356.97
 OPT
f=1567
TT=0.195
T1=0.18
 SAT (TO)
f=1636
TT=1800.1
T1=264.8
 OPT
f=1567
TT=0.021
T1=0.01
 OPT
f=1567
TT=0.016
T1=0.01
 SAT (TO)
f=1569
TT=1800.19
T1=831.41
 OPT
f=1567
TT=0.044
T1=0.01
 SAT (TO)
f=1585
TT=1800.06
T1=306.11
 OPT
f=1567
TT=0.051
T1=0.02
 SAT (TO)
f=1599
TT=1800.01
T1=1800.3
 ? (TO)

TT=1800.11

 ? (TO)

TT=1800.04

 SAT (TO)
f=1602
TT=1800.53
T1=900.31
 SAT (TO)
f=1595
TT=1800.55
T1=900.31
 SAT (TO)
f=1569
TT=1800.45
T1=123.64
 SAT (TO)
f=1653
TT=1800.48
T1=250.88
 SAT (TO)
f=1602
TT=1800.06
T1=651.08
 OPT
f=1567
TT=0.065
T1=0.06
 OPT
f=1567
TT=0.064
T1=0.06
 OPT
f=1567
TT=0.028
T1=0.02
 ? (TO)

TT=1800.03

 ? (TO)

TT=1800.03

 ?

TT=1799.86

 ?

TT=1799.54
normalized-PB06/OPT-SMALLINT/
submitted-PB05/manquinho/
synthesis-ptl-cmos-circuits/normalized-cm42a.opb 		OPT
f=694
TT=0.009
T1=0
 OPT
f=694
TT=0.009
T1=0
 SAT (TO)
f=694
TT=1800.03
T1=120.4
 ? (TO)

TT=1800.06

 ? (TO)

TT=1800.13

 ? (TO)

TT=1800.06

 ? (TO)

TT=1800.07

 ? (TO)

TT=1800.04

 ? (TO)

TT=1800.08

 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.07

 OPT
f=694
TT=0.017
T1=0.01
 OPT
f=694
TT=175.199
T1=81.58
 SAT (TO)
f=694
TT=1802.12
T1=343.93
 OPT
f=694
TT=1124.06
T1=302.29
 SAT (TO)
f=739
TT=1800.06
T1=1462.19
 OPT
f=694
TT=0.01
T1=0
 SAT (TO)
f=707
TT=1800.78
T1=744.87
 OPT
f=694
TT=0.024
T1=0.02
 OPT
f=694
TT=0.021
T1=0.02
 SAT (TO)
f=694
TT=1800.12
T1=103.29
 OPT
f=694
TT=0.051
T1=0.04
 SAT (TO)
f=694
TT=1800.11
T1=77.31
 OPT
f=694
TT=0.049
T1=0.04
 OPT
f=694
TT=77.428
T1=77.43
 ? (TO)

TT=1800.07

 ? (TO)

TT=1800.07

 SAT (TO)
f=696
TT=1800.03
T1=900.21
 SAT (TO)
f=696
TT=1800.16
T1=900.31
 SAT (TO)
f=705
TT=1800.02
T1=756.18
 SAT (TO)
f=737
TT=1800.09
T1=1024.46
 SAT (TO)
f=694
TT=1800
T1=1477.94
 OPT
f=694
TT=0.183
T1=0.16
 OPT
f=694
TT=0.19
T1=0.16
 OPT
f=694
TT=0.164
T1=0.13
 ? (TO)

TT=1800.03

 ? (TO)

TT=1800.03

 ?

TT=1799.54

 ?

TT=1799.9
normalized-PB06/OPT-SMALLINT/
submitted-PB05/manquinho/
synthesis-ptl-cmos-circuits/normalized-cmb.opb 		OPT
f=1053
TT=0.043
T1=0.04
 OPT
f=1053
TT=0.39
T1=0.35
 SAT (TO)
f=1173
TT=1800.02
T1=919.1
 ? (TO)

TT=1800.1

 ? (TO)

TT=1800.12

 ? (TO)

TT=1800.1

 ? (TO)

TT=1800.12

 ? (TO)

TT=1800.06

 ? (TO)

TT=1800.13

 ? (TO)

TT=1800.1

 ? (TO)

TT=1800.08

 OPT
f=1053
TT=0.048
T1=0.02
 SAT (TO)
f=1156
TT=1800.07
T1=718.74
 SAT (TO)
f=1363
TT=1802.11
T1=0.1
 SAT
f=1057
TT=1783.01
T1=0.01
 SAT
f=1552
TT=1103.22
T1=206.26
 OPT
f=1053
TT=0.386
T1=0.35
 ? (exit code)

TT=1584.35

 OPT
f=1053
TT=0.06
T1=0.05
 OPT
f=1053
TT=0.043
T1=0.04
 SAT (TO)
f=1191
TT=1800.04
T1=972.09
 OPT
f=1053
TT=0.071
T1=0.06
 SAT (TO)
f=1156
TT=1800.07
T1=495.39
 OPT
f=1053
TT=0.098
T1=0.09
 SAT (TO)
f=1156
TT=1800.1
T1=1800.5
 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.1

 OPT
f=1053
TT=0.124
T1=0.06
 OPT
f=1053
TT=0.126
T1=0.06
 SAT (TO)
f=1201
TT=1800.21
T1=129.21
 SAT (TO)
f=1411
TT=1800.91
T1=1475.41
 SAT (TO)
f=1524
TT=1800.06
T1=0.26
 OPT
f=1053
TT=0.121
T1=0.11
 OPT
f=1053
TT=0.115
T1=0.1
 OPT
f=1053
TT=0.066
T1=0.06
 ? (TO)

TT=1800.03

 ? (TO)

TT=1800.02

 OPT
f=1053
TT=0.065
T1=0.06
 OPT
f=1053
TT=0.064
T1=0.06
normalized-PB06/OPT-SMALLINT/
submitted-PB05/manquinho/
synthesis-ptl-cmos-circuits/normalized-mux.opb 		OPT
f=872
TT=0.011
T1=0.01
 OPT
f=872
TT=0.011
T1=0.01
 SAT (TO)
f=1003
TT=1800.02
T1=1418.74
 ? (TO)

TT=1800.12

 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.11

 ? (TO)

TT=1800.11

 ? (TO)

TT=1800.08

 ? (TO)

TT=1800.11

 ? (TO)

TT=1800.06

 ? (TO)

TT=1800.11

 OPT
f=872
TT=0.012
T1=0.01
 SAT (TO)
f=1196
TT=1800.1
T1=9.25
 SAT (TO)
f=1370
TT=1800.34
T1=860.23
 SAT
f=882
TT=1783
T1=0.01
 SAT
f=1604
TT=1343.88
T1=1157.59
 OPT
f=872
TT=0.013
T1=0.01
 ? (exit code)

TT=1217.35

 OPT
f=872
TT=0.038
T1=0.03
 OPT
f=872
TT=0.022
T1=0.02
 SAT (TO)
f=1140
TT=1800.03
T1=24.26
 OPT
f=872
TT=0.035
T1=0.03
 SAT (TO)
f=1030
TT=1801.13
T1=569.29
 OPT
f=872
TT=0.041
T1=0.03
 SAT (TO)
f=1197
TT=1800.08
T1=1800.4
 ? (TO)

TT=1800.05

 ? (TO)

TT=1800.09

 OPT
f=872
TT=0.065
T1=0.03
 OPT
f=872
TT=0.063
T1=0.03
 SAT (TO)
f=1123
TT=1800.75
T1=983.39
 SAT (TO)
f=1313
TT=1800.01
T1=1589.93
 SAT (TO)
f=1330
TT=1800.04
T1=0.23
 OPT
f=872
TT=0.034
T1=0.02
 OPT
f=872
TT=0.035
T1=0.02
 OPT
f=872
TT=0.04
T1=0.03
 ? (TO)

TT=1800.03

 ? (TO)

TT=1800.03

 OPT
f=872
TT=0.033
T1=0.03
 OPT
f=872
TT=0.033
T1=0.03
normalized-PB06/OPT-SMALLINT/
submitted-PB05/manquinho/synthesis-ptl-cmos-circuits/
normalized-my_adder.opb 		OPT
f=4561
TT=0.175
T1=0.17
 OPT
f=4561
TT=13.83
T1=1.31
 SAT (TO)
f=5331
TT=1800.11
T1=1793.55
 ? (TO)

TT=1800.05

 ? (TO)

TT=1800.08

 ? (TO)

TT=1800.01

 ? (TO)

TT=1800.03

 ? (TO)

TT=1800.13

 ? (TO)

TT=1800.08

 ? (TO)

TT=1800.12

 ? (TO)

TT=1800.13

 OPT
f=4561
TT=1.078
T1=0.73
 SAT (TO)
f=5525
TT=1800.04
T1=804.48
 SAT (TO)
f=6953
TT=1800.48
T1=0.09
 SAT
f=4981
TT=1783.01
T1=0.01
 ? (exit code)

TT=596.333

 OPT
f=4561
TT=13.813
T1=1.3
 ? (exit code)

TT=831.89

 OPT
f=4561
TT=0.479
T1=0.32
 OPT
f=4561
TT=0.175
T1=0.17
 SAT (TO)
f=5481
TT=1800.08
T1=458.43
 OPT
f=4561
TT=0.825
T1=0.79
 SAT (TO)
f=5204
TT=1800.11
T1=964.61
 OPT
f=4561
TT=0.524
T1=0.41
 SAT (TO)
f=5439
TT=1800.09
T1=1800.71
 ? (TO)

TT=1800.08

 ? (TO)

TT=1800.06

 SAT (TO)
f=5486
TT=1800.09
T1=900.31
 SAT (TO)
f=5410
TT=1800.04
T1=900.21
 SAT (TO)
f=5246
TT=1800.5
T1=790.38
 SAT (TO)
f=6091
TT=1800.05
T1=477.89
 SAT (TO)
f=6042
TT=1722.23
T1=0.4
 OPT
f=4561
TT=0.643
T1=0.37
 OPT
f=4561
TT=0.606
T1=0.34
 OPT
f=4561
TT=0.464
T1=0.28
 ? (TO)

TT=1800.09

 ? (TO)

TT=1800.11

 ?

TT=1799.59

 ?

TT=1799.59



Statisticsbsolo
3.2
(complete)		clasp
2.0.6-R5325 (opt)
(complete)		npSolver
1.0
(complete)		npSolver
1.0 (fixed)
(complete)		npSolver
inc
(complete)		npSolver
inc (fixed)
(complete)		npSolver
inc-topDown
(complete)		npSolver
inc-topDown (fixed)
(complete)		npSolver
inc-topdown-quickBound
(complete)		npSolver
inc-topdown-quickBound (fixed)
(complete)		PB07: bsolo
3.0.17
(complete)		PB07: minisat+
1.14
(complete)		PB07: PB-clasp
2007-04-10
(complete)		PB07: Pueblo
1.4
(incomplete)		PB07: SAT4JPseudoResolution
2007-03-23
(complete)		PB09: bsolo
3.1
(complete)		PB09: SAT4J Pseudo Resolution
2.1.1
(complete)		PB09: SCIPspx
SCIP 1.1.0.7 with SoPLEX 1.4.1(24.4.2009)
(complete)		PB10: pb_cplex
2010-06-29
(complete)		PB10: SAT4J PB RES // CP
2.2.0 2010-05-31
(complete)		PB10: SCIPspx
SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver
(complete)		PB11: Sat4j Res//CP
2.3.0
(complete)		PB11: SCIP spx E_2
2011-06-10 (fixed)
(complete)		PB12: minisatp
1.0-2-g022594c
(complete)		pb2sat
2012-05-19
(complete)		pb2satCp2
2012-05-19
(complete)		pwbo
2.0
(complete)		pwbo
2.02
(complete)		SAT 4j PB RES // CP
2.3.2 Snapshot
(complete)		Sat 4j PB Resolution
2.3.2 Snapshot
(complete)		SAT4J PB specific settings
2.3.2 snapshot
(complete)		SCIP spx
SCIP 2.1.1.4. with SoPlex 1.6.0.3 fixed
(complete)		SCIP spx E
SCIP 2.1.1.4. Exp with SoPlex 1.6.0.3 fixed
(complete)		SCIP spx standard
SCIP 2.1.1.4. with SoPlex 1.6.0.3 standard fixed
(complete)		toysat
2012-05-17
(complete)		toysat
2012-06-01
(complete)		wbo
1.7
(complete)		wbo
1.72
(complete)
Number of times the solver is able to give the best known answer82222222220323202010210210322052201010102205
Number of times the solver is the best solver from a complete solver point of view
(i.e. best known answer and best TT time)		41000000000001000060000000010000000000