PB'10 competition: satisfaction and optimization track: results by benchmark

Results by benchmark for category no optimisation, small integers, linear constraints (DEC-SMALLINT-LIN), subcategory Industrial, subsubcategory FPGA ...

This page displays the results of the different solvers for each benchmark for category no optimisation, small integers, linear constraints (DEC-SMALLINT-LIN), subcategory Industrial, subsubcategory FPGA ...

REMINDER

Keep in mind that the 'Best result' columns only provide the best result given by one of the solvers. This 'Best result' may be wrong in case of an UNSATISFIABLE or OPTIMUM FOUND answer (because there's no efficient way to check these answers).

Description of a cell contents:

Cell example	Meaning
Answer	Solver result
f=...	value of the objective function for the model reported by the solver
TT=...	Total Time (TT): this is the CPU time (in seconds) used by the solver until termination. This time is only meaningful for complete solvers because incomplete solvers will always run until they time out

Remember that CPU time and wall clock time are two very different notions. The CPU time represents the time during which the instructions of the solver were executed by the processor. The wall clock time represents how much time ellapsed on the clock. For a same event, the CPU time may be either smaller or greater than the wall clock time depending on the number of threads of execution and the number of processors.

Meaning of some abbreviations:

Abbreviation	Meaning
f=...	Value of the objective function
TO	Time Out
MO	Mem. Out (out of memory)

Meaning of the different colors:

Color	Meaning
text	the solver cannot handle this instance
text	the solver gave no answer
text	the solver could give an answer (SAT)
text	the solver gave a definitive answer (OPTIMUM FOUND or UNSAT)
text	the solver performed better than the other ones on that instance (complete solvers point of view)
text	the solver performed better than the other ones on that instance (incomplete solvers point of view)
text	the solver was ended by a signal or other problem
text	the solver gave an incomplete answer
text	the solver gave a wrong answer

For better readability, you may choose to hide some solvers:
borg-pb 10.05.30 (complete)
bsolo 3.2 Card (complete)
bsolo 3.2 Cl (complete)
pb_cplex 2010-06-29 (complete)
PB/CT 0.1 (complete)
PB/CT 0.1 fixed (complete)
PBPASSolver 2010-06-13 (complete)
PB-wave alpha 2 (incomplete)
SAT4J PB CuttingPlanes 2.2.0 2010-05-26 (complete)
SAT4J PB RES // CP 2.2.0 2010-05-31 (complete)
SAT4J PB Resolution 2.2.0 2010-05-26 (complete)
SCIPclp SCIP 1.2.1.2 with Clp 1.11.1 (Release Version) as LP solver (complete)
SCIPnone SCIP 1.2.1.2 without any LP solver (complete)
SCIPspx SCIP 1.2.1.2 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)
SCIPspx SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)
wbo 1.4a (complete)

Bench name	Best results on this instance	borg-pb 10.05.30 (complete)	bsolo 3.2 Card (complete)	bsolo 3.2 Cl (complete)	pb_cplex 2010-06-29 (complete)	PB/CT 0.1 (complete)	PB/CT 0.1 fixed (complete)	PBPASSolver 2010-06-13 (complete)	PB-wave alpha 2 (incomplete)	SAT4J PB CuttingPlanes 2.2.0 2010-05-26 (complete)	SAT4J PB RES // CP 2.2.0 2010-05-31 (complete)	SAT4J PB Resolution 2.2.0 2010-05-26 (complete)	SCIPclp SCIP 1.2.1.2 with Clp 1.11.1 (Release Version) as LP solver (complete)	SCIPnone SCIP 1.2.1.2 without any LP solver (complete)	SCIPspx SCIP 1.2.1.2 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	SCIPspx SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	wbo 1.4a (complete)
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl10_11_pb.cnf.cr.opb	UNSAT TT=0.008	UNSAT TT=605.879	UNSAT TT=0.008	UNSAT TT=152.381	UNSAT TT=0.015	UNSAT TT=519.953	UNSAT TT=1064.54	? (TO) TT=1800.06	? (TO) TT=1800.12	UNSAT TT=0.375	UNSAT TT=0.889	UNSAT TT=968.748	UNSAT TT=0.04	? (TO) TT=1802.17	UNSAT TT=0.04	UNSAT TT=0.038	UNSAT TT=375.744
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl10_15_pb.cnf.cr.opb	UNSAT TT=0.008	UNSAT TT=608.612	UNSAT TT=0.008	UNSAT TT=420.603	UNSAT TT=0.02	UNSAT TT=1363.09	? (TO) TT=1800.05	? (TO) TT=1800.1	? (TO) TT=1800.09	UNSAT TT=0.367	UNSAT TT=0.541	? (TO) TT=1800.24	UNSAT TT=0.042	? (TO) TT=1802.19	UNSAT TT=0.044	UNSAT TT=0.041	UNSAT TT=1657.91
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl10_20_pb.cnf.cr.opb	UNSAT TT=0.011	UNSAT TT=601.272	UNSAT TT=0.011	? TT=1798.03	UNSAT TT=0.023	UNSAT TT=1661.69	UNSAT TT=1733.23	? (TO) TT=1800.04	? (TO) TT=1800.05	UNSAT TT=0.409	UNSAT TT=0.501	? (TO) TT=1800.18	UNSAT TT=0.045	? (TO) TT=1802.15	UNSAT TT=0.048	UNSAT TT=0.047	UNSAT TT=466.323
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl15_16_pb.cnf.cr.opb	UNSAT TT=0.019	UNSAT TT=600.797	UNSAT TT=0.019	? TT=1798.01	UNSAT TT=0.027	? (TO) TT=1800.05	? (TO) TT=1800.06	? (TO) TT=1800.05	? (TO) TT=1800.1	UNSAT TT=0.514	UNSAT TT=0.645	? (TO) TT=1800.18	UNSAT TT=0.05	? (TO) TT=1802.2	UNSAT TT=0.048	UNSAT TT=0.047	? (TO) TT=1800.13
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl15_20_pb.cnf.cr.opb	UNSAT TT=0.028	UNSAT TT=600.231	UNSAT TT=0.028	? TT=1798.01	UNSAT TT=0.031	? (TO) TT=1800.01	? (TO) TT=1800.11	? (TO) TT=1800.03	? (TO) TT=1800.04	UNSAT TT=0.475	UNSAT TT=1.688	? (TO) TT=1800.22	UNSAT TT=0.055	? (TO) TT=1802.19	UNSAT TT=0.056	UNSAT TT=0.054	? (TO) TT=1800.16
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl15_25_pb.cnf.cr.opb	UNSAT TT=0.03	UNSAT TT=602.746	UNSAT TT=0.03	? TT=1798.02	UNSAT TT=0.039	? (TO) TT=1800.03	? (TO) TT=1800.01	? (TO) TT=1800.04	? (TO) TT=1800.07	UNSAT TT=0.523	UNSAT TT=0.743	? (TO) TT=1800.2	UNSAT TT=0.056	? (TO) TT=1802.25	UNSAT TT=0.059	UNSAT TT=0.055	? (TO) TT=1800.11
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl20_21_pb.cnf.cr.opb	UNSAT TT=0.042	UNSAT TT=598.94	UNSAT TT=0.048	? TT=1798.02	UNSAT TT=0.042	? (TO) TT=1800.13	? (TO) TT=1800.03	? (TO) TT=1800.1	? (TO) TT=1800.08	UNSAT TT=0.694	UNSAT TT=1.628	? (TO) TT=1800.2	UNSAT TT=0.064	? (TO) TT=1802.22	UNSAT TT=0.063	UNSAT TT=0.061	? (TO) TT=1800.13
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl20_25_pb.cnf.cr.opb	UNSAT TT=0.045	UNSAT TT=603.715	UNSAT TT=0.045	? TT=1798.03	UNSAT TT=0.05	? (TO) TT=1800.09	? (TO) TT=1800.04	? (TO) TT=1800.05	? (TO) TT=1800.06	UNSAT TT=0.596	UNSAT TT=0.724	? (TO) TT=1800.25	UNSAT TT=0.072	? (TO) TT=1802.23	UNSAT TT=0.068	UNSAT TT=0.063	? (TO) TT=1800.19
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl20_30_pb.cnf.cr.opb	UNSAT TT=0.058	UNSAT TT=600.987	UNSAT TT=0.058	? TT=1798.03	UNSAT TT=0.059	? (TO) TT=1800.09	? (TO) TT=1800.08	? (TO) TT=1800.02	? (TO) TT=1800.1	UNSAT TT=0.657	UNSAT TT=1.578	? (TO) TT=1800.17	UNSAT TT=0.076	? (TO) TT=1802.21	UNSAT TT=0.076	UNSAT TT=0.072	? (TO) TT=1800.13
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl30_31_pb.cnf.cr.opb	UNSAT TT=0.091	UNSAT TT=600.999	UNSAT TT=0.138	? TT=1798.14	UNSAT TT=0.091	? (TO) TT=1800.1	? (TO) TT=1800.12	? (TO) TT=1800.07	? (TO) TT=1800.05	UNSAT TT=1.344	UNSAT TT=2.672	? (TO) TT=1800.2	UNSAT TT=0.122	? (TO) TT=1802.16	UNSAT TT=0.103	UNSAT TT=0.098	? (TO) TT=1800.21
Bench name	Best results	borg-pb 10.05.30 (complete)	bsolo 3.2 Card (complete)	bsolo 3.2 Cl (complete)	pb_cplex 2010-06-29 (complete)	PB/CT 0.1 (complete)	PB/CT 0.1 fixed (complete)	PBPASSolver 2010-06-13 (complete)	PB-wave alpha 2 (incomplete)	SAT4J PB CuttingPlanes 2.2.0 2010-05-26 (complete)	SAT4J PB RES // CP 2.2.0 2010-05-31 (complete)	SAT4J PB Resolution 2.2.0 2010-05-26 (complete)	SCIPclp SCIP 1.2.1.2 with Clp 1.11.1 (Release Version) as LP solver (complete)	SCIPnone SCIP 1.2.1.2 without any LP solver (complete)	SCIPspx SCIP 1.2.1.2 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	SCIPspx SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	wbo 1.4a (complete)
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl30_35_pb.cnf.cr.opb	UNSAT TT=0.102	UNSAT TT=600.085	UNSAT TT=0.146	? TT=1798.08	UNSAT TT=0.102	? (TO) TT=1800.08	? (TO) TT=1800.05	? (TO) TT=1800.04	? (TO) TT=1800.09	UNSAT TT=0.901	UNSAT TT=1.385	? (TO) TT=1800.18	UNSAT TT=0.136	? (TO) TT=1802.17	UNSAT TT=0.128	UNSAT TT=0.121	? (TO) TT=1800.14
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl30_40_pb.cnf.cr.opb	UNSAT TT=0.119	UNSAT TT=602.978	UNSAT TT=0.237	? TT=1798.08	UNSAT TT=0.119	? (TO) TT=1800.02	? (TO) TT=1800.13	? (TO) TT=1800.04	? (TO) TT=1800.06	UNSAT TT=0.885	UNSAT TT=1.991	? (TO) TT=1800.14	UNSAT TT=0.147	? (TO) TT=1802.19	UNSAT TT=0.136	UNSAT TT=0.126	? (TO) TT=1800.18
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl35_36_pb.cnf.cr.opb	UNSAT TT=0.126	UNSAT TT=604.982	UNSAT TT=0.236	? TT=1798.13	UNSAT TT=0.126	? (TO) TT=1800.08	? (TO) TT=1800.06	? (TO) TT=1800.11	? (TO) TT=1800.07	UNSAT TT=1.921	UNSAT TT=3.699	? (TO) TT=1800.23	UNSAT TT=0.173	? (TO) TT=1802.1	UNSAT TT=0.137	UNSAT TT=0.13	? (TO) TT=1800.2
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl35_40_pb.cnf.cr.opb	UNSAT TT=0.142	UNSAT TT=610.81	UNSAT TT=0.403	? TT=1798.11	UNSAT TT=0.142	? (TO) TT=1800.07	? (TO) TT=1800.11	? (TO) TT=1800.1	? (TO) TT=1800.11	UNSAT TT=1.192	UNSAT TT=1.713	? (TO) TT=1800.17	UNSAT TT=0.187	? (TO) TT=1802.15	UNSAT TT=0.155	UNSAT TT=0.151	? (TO) TT=1800.18
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl35_45_pb.cnf.cr.opb	UNSAT TT=0.155	UNSAT TT=601.154	UNSAT TT=0.269	? TT=1798.1	UNSAT TT=0.162	? (TO) TT=1800.06	? (TO) TT=1800.12	? (TO) TT=1800.05	? (TO) TT=1800.03	UNSAT TT=1.194	UNSAT TT=3.047	? (TO) TT=1800.11	UNSAT TT=0.204	? (TO) TT=1802.14	UNSAT TT=0.171	UNSAT TT=0.155	? (TO) TT=1800.2
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl40_41_pb.cnf.cr.opb	UNSAT TT=0.17	UNSAT TT=603.747	UNSAT TT=0.367	? TT=1798.13	UNSAT TT=0.17	? (TO) TT=1800.03	? (TO) TT=1800.12	? (TO) TT=1800.06	? (TO) TT=1800.08	UNSAT TT=1.781	UNSAT TT=3.881	? (TO) TT=1800.17	UNSAT TT=0.233	? (TO) TT=1802.14	UNSAT TT=0.182	UNSAT TT=0.173	? (TO) TT=1800.18
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl40_45_pb.cnf.cr.opb	UNSAT TT=0.19	UNSAT TT=600.836	UNSAT TT=0.366	? TT=1798.13	UNSAT TT=0.19	? (TO) TT=1800.03	? (TO) TT=1800.11	? (TO) TT=1800.06	? (TO) TT=1800.06	UNSAT TT=1.138	UNSAT TT=2.183	? (TO) TT=1800.18	UNSAT TT=0.259	? (TO) TT=1802.12	UNSAT TT=0.207	UNSAT TT=0.198	? (TO) TT=1800.22
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl40_50_pb.cnf.cr.opb	UNSAT TT=0.21	UNSAT TT=603.27	UNSAT TT=0.473	? TT=1798.1	UNSAT TT=0.214	? (TO) TT=1800.08	? (TO) TT=1800.03	? (TO) TT=1800.07	? (TO) TT=1800.05	UNSAT TT=1.201	UNSAT TT=2.351	? (TO) TT=1800.21	UNSAT TT=0.29	? (TO) TT=1801.88	UNSAT TT=0.228	UNSAT TT=0.21	? (TO) TT=1800.21
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl50_51_pb.cnf.cr.opb	UNSAT TT=0.26	UNSAT TT=614.688	UNSAT TT=0.735	? TT=1798.12	UNSAT TT=0.295	? (TO) TT=1800.09	? (TO) TT=1800.11	? (TO) TT=1800.1	? (TO) TT=1800.05	UNSAT TT=2.622	UNSAT TT=4.798	? (TO) TT=1800.17	UNSAT TT=0.448	? (TO) TT=1800.9	UNSAT TT=0.271	UNSAT TT=0.26	? (TO) TT=1800.18
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl50_55_pb.cnf.cr.opb	UNSAT TT=0.29	? (TO) TT=1800.07	UNSAT TT=1.076	? TT=1798.13	UNSAT TT=0.321	? (TO) TT=1800.08	? (TO) TT=1800.07	? (TO) TT=1800.04	? (TO) TT=1800.06	UNSAT TT=1.781	UNSAT TT=2.924	? (TO) TT=1800.2	UNSAT TT=0.466	? (TO) TT=1800.73	UNSAT TT=0.301	UNSAT TT=0.29	? (TO) TT=1800.2
Bench name	Best results	borg-pb 10.05.30 (complete)	bsolo 3.2 Card (complete)	bsolo 3.2 Cl (complete)	pb_cplex 2010-06-29 (complete)	PB/CT 0.1 (complete)	PB/CT 0.1 fixed (complete)	PBPASSolver 2010-06-13 (complete)	PB-wave alpha 2 (incomplete)	SAT4J PB CuttingPlanes 2.2.0 2010-05-26 (complete)	SAT4J PB RES // CP 2.2.0 2010-05-31 (complete)	SAT4J PB Resolution 2.2.0 2010-05-26 (complete)	SCIPclp SCIP 1.2.1.2 with Clp 1.11.1 (Release Version) as LP solver (complete)	SCIPnone SCIP 1.2.1.2 without any LP solver (complete)	SCIPspx SCIP 1.2.1.2 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	SCIPspx SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	wbo 1.4a (complete)
normalized-PB06/SATUNSAT-SMALLINT/submitted-PB05/ aloul/FPGA_SAT05/normalized-chnl50_60_pb.cnf.cr.opb	UNSAT TT=0.301	UNSAT TT=603.391	UNSAT TT=7.447	? TT=1798.11	UNSAT TT=0.356	? (TO) TT=1800.1	? (TO) TT=1800.04	? (TO) TT=1800	? (TO) TT=1800.07	UNSAT TT=1.806	UNSAT TT=2.661	? (TO) TT=1800.22	UNSAT TT=0.493	? (TO) TT=1800.66	UNSAT TT=0.317	UNSAT TT=0.301	? (TO) TT=1800.22
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga10_10_sat_pb.cnf.cr.opb	SAT TT=0.007 T1=0	SAT TT=1.434 T1=1.44	SAT TT=0.008 T1=0	SAT TT=0.011 T1=0.01	SAT TT=0.038 T1=0.03	SAT TT=0.03 T1=0.02	SAT TT=0.029 T1=0.02	SAT TT=2.899 T1=2.89	SAT TT=0.008 T1=0	SAT TT=0.589 T1=0.4	SAT TT=1.068 T1=1.31	SAT TT=0.695 T1=0.45	SAT TT=0.54 T1=0.53	SAT TT=0.093 T1=0.08	SAT TT=0.337 T1=0.32	SAT TT=0.325 T1=0.31	SAT TT=0.007 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga10_8_sat_pb.cnf.cr.opb	SAT TT=0.002 T1=0	SAT TT=1.347 T1=1.9	SAT TT=0.004 T1=0	SAT TT=0.004 T1=0	SAT TT=0.031 T1=0.03	SAT TT=0.027 T1=0.02	SAT TT=0.026 T1=0.02	SAT TT=0.676 T1=0.67	SAT TT=0.008 T1=0	SAT TT=3.258 T1=1.73	SAT TT=0.801 T1=1.31	SAT TT=0.69 T1=0.4	SAT TT=0.077 T1=0.07	SAT TT=0.07 T1=0.06	SAT TT=0.074 T1=0.06	SAT TT=0.072 T1=0.06	SAT TT=0.002 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga10_9_sat_pb.cnf.cr.opb	SAT TT=0.008 T1=0	SAT TT=1.388 T1=1.72	SAT TT=0.027 T1=0.02	SAT TT=0.022 T1=0.02	SAT TT=0.032 T1=0.03	SAT TT=0.028 T1=0.02	SAT TT=0.026 T1=0.02	SAT TT=1.868 T1=1.86	SAT TT=0.008 T1=0	SAT TT=2.721 T1=1.4	SAT TT=1.553 T1=1.31	SAT TT=1.078 T1=0.61	SAT TT=0.084 T1=0.07	SAT TT=0.046 T1=0.03	SAT TT=0.082 T1=0.07	SAT TT=0.078 T1=0.06	SAT TT=0.01 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga11_10_sat_pb.cnf.cr.opb	SAT TT=0.003 T1=0	SAT TT=1.488 T1=2.04	SAT TT=0.005 T1=0	SAT TT=0.006 T1=0	SAT TT=0.042 T1=0.04	SAT TT=0.045 T1=0.04	SAT TT=0.046 T1=0.04	SAT TT=5.353 T1=5.34	SAT TT=0.008 T1=0	SAT TT=0.701 T1=0.44	SAT TT=1.288 T1=1.32	SAT TT=0.767 T1=0.48	SAT TT=0.096 T1=0.08	SAT TT=0.049 T1=0.04	SAT TT=0.099 T1=0.09	SAT TT=0.094 T1=0.08	SAT TT=0.003 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga11_11_sat_pb.cnf.cr.opb	SAT TT=0.003 T1=0	SAT TT=1.562 T1=1.92	SAT TT=0.005 T1=0	SAT TT=0.006 T1=0	SAT TT=0.049 T1=0.04	SAT TT=0.034 T1=0.03	SAT TT=0.033 T1=0.03	SAT TT=143.719 T1=143.74	SAT TT=0.009 T1=0	SAT TT=2.511 T1=1.32	SAT TT=1.254 T1=1.33	SAT TT=0.808 T1=0.51	SAT TT=0.098 T1=0.09	SAT TT=0.05 T1=0.04	SAT TT=0.1 T1=0.09	SAT TT=0.096 T1=0.08	SAT TT=0.003 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga11_9_sat_pb.cnf.cr.opb	SAT TT=0.003 T1=0	SAT TT=1.488 T1=1.85	SAT TT=0.005 T1=0	SAT TT=0.005 T1=0	SAT TT=0.035 T1=0.03	SAT TT=0.045 T1=0.04	SAT TT=0.044 T1=0.04	SAT TT=13.582 T1=13.57	SAT TT=0.009 T1=0	SAT TT=7.683 T1=2.07	SAT TT=1.252 T1=1.31	SAT TT=0.851 T1=0.47	SAT TT=0.101 T1=0.09	SAT TT=0.106 T1=0.09	SAT TT=0.102 T1=0.09	SAT TT=0.097 T1=0.08	SAT TT=0.003 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga12_10_sat_pb.cnf.cr.opb	SAT TT=0.004 T1=0	SAT TT=1.5 T1=2.09	SAT TT=0.006 T1=0	SAT TT=0.005 T1=0	SAT TT=0.056 T1=0.05	SAT TT=0.036 T1=0.03	SAT TT=0.034 T1=0.03	SAT TT=98.151 T1=98.15	SAT TT=0.01 T1=0	SAT TT=231.479 T1=226.52	SAT TT=1.96 T1=1.33	SAT TT=0.889 T1=0.51	SAT TT=1.376 T1=1.36	SAT TT=0.151 T1=0.14	SAT TT=0.518 T1=0.5	SAT TT=0.505 T1=0.49	SAT TT=0.004 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga12_11_sat_pb.cnf.cr.opb	SAT TT=0.009 T1=0	SAT TT=1.327 T1=1.55	SAT TT=0.037 T1=0.03	SAT TT=0.044 T1=0.04	SAT TT=0.042 T1=0.04	SAT TT=0.051 T1=0.04	SAT TT=0.049 T1=0.04	SAT TT=34.773 T1=34.75	SAT TT=0.009 T1=0	SAT TT=3.361 T1=1.72	SAT TT=2.485 T1=1.34	SAT TT=1.127 T1=0.65	SAT TT=0.523 T1=0.51	SAT TT=0.14 T1=0.13	SAT TT=0.604 T1=0.59	SAT TT=0.592 T1=0.58	SAT TT=0.014 T1=0.01
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga12_12_sat_pb.cnf.cr.opb	SAT TT=0.003 T1=0	SAT TT=1.826 T1=2.2	SAT TT=0.007 T1=0	SAT TT=0.006 T1=0	SAT TT=0.093 T1=0.09	SAT TT=0.041 T1=0.03	SAT TT=0.041 T1=0.03	SAT TT=278.691 T1=278.79	SAT TT=0.009 T1=0	SAT TT=3.643 T1=1.37	SAT TT=2.154 T1=1.35	SAT TT=1.011 T1=0.58	SAT TT=0.684 T1=0.67	SAT TT=0.058 T1=0.05	SAT TT=0.462 T1=0.45	SAT TT=0.443 T1=0.43	SAT TT=0.003 T1=0
Bench name	Best results	borg-pb 10.05.30 (complete)	bsolo 3.2 Card (complete)	bsolo 3.2 Cl (complete)	pb_cplex 2010-06-29 (complete)	PB/CT 0.1 (complete)	PB/CT 0.1 fixed (complete)	PBPASSolver 2010-06-13 (complete)	PB-wave alpha 2 (incomplete)	SAT4J PB CuttingPlanes 2.2.0 2010-05-26 (complete)	SAT4J PB RES // CP 2.2.0 2010-05-31 (complete)	SAT4J PB Resolution 2.2.0 2010-05-26 (complete)	SCIPclp SCIP 1.2.1.2 with Clp 1.11.1 (Release Version) as LP solver (complete)	SCIPnone SCIP 1.2.1.2 without any LP solver (complete)	SCIPspx SCIP 1.2.1.2 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	SCIPspx SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	wbo 1.4a (complete)
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga13_11_sat_pb.cnf.cr.opb	SAT TT=0.004 T1=0	SAT TT=2.365 T1=2.34	SAT TT=0.29 T1=0.28	SAT TT=0.478 T1=0.47	SAT TT=0.072 T1=0.07	SAT TT=0.049 T1=0.04	SAT TT=0.04 T1=0.03	SAT TT=7.863 T1=7.84	SAT TT=0.009 T1=0	SAT TT=441.561 T1=434.89	SAT TT=10.536 T1=5.42	SAT TT=2.414 T1=1.67	SAT TT=0.681 T1=0.67	SAT TT=0.105 T1=0.09	SAT TT=1.244 T1=1.23	SAT TT=1.209 T1=1.19	SAT TT=0.004 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga13_12_sat_pb.cnf.cr.opb	SAT TT=0.009 T1=0	SAT TT=2.057 T1=2.1	SAT TT=0.009 T1=0	SAT TT=0.017 T1=0.01	SAT TT=0.055 T1=0.05	SAT TT=0.06 T1=0.05	SAT TT=0.047 T1=0.04	SAT TT=228.208 T1=228.26	SAT TT=0.009 T1=0	SAT TT=1.059 T1=0.62	SAT TT=1.984 T1=1.36	SAT TT=0.904 T1=0.53	SAT TT=0.676 T1=0.66	SAT TT=0.246 T1=0.23	SAT TT=1.249 T1=1.24	SAT TT=1.211 T1=1.2	SAT TT=0.009 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga13_13_sat_pb.cnf.cr.opb	SAT TT=0.009 T1=0	SAT TT=2.499 T1=2.48	SAT TT=0.011 T1=0.01	SAT TT=0.015 T1=0.01	SAT TT=0.089 T1=0.08	SAT TT=0.048 T1=0.04	SAT TT=0.048 T1=0.04	SAT TT=1359.11 T1=1359.49	SAT TT=0.009 T1=0	SAT TT=1.801 T1=1.01	SAT TT=1.52 T1=1.38	SAT TT=1.092 T1=0.6	SAT TT=0.353 T1=0.34	SAT TT=0.224 T1=0.21	SAT TT=0.42 T1=0.41	SAT TT=0.408 T1=0.39	SAT TT=0.009 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga14_12_sat_pb.cnf.cr.opb	SAT TT=0.01 T1=0	SAT TT=6.881 T1=6.81	SAT TT=0.318 T1=0.31	SAT TT=0.797 T1=0.79	SAT TT=0.063 T1=0.06	SAT TT=0.09 T1=0.08	SAT TT=0.338 T1=0.33	SAT TT=124.198 T1=124.2	SAT TT=0.01 T1=0	SAT TT=495.026 T1=487.78	SAT TT=4.029 T1=2.4	SAT TT=2.264 T1=1.57	SAT TT=1.435 T1=1.42	SAT TT=0.232 T1=0.22	SAT TT=1.688 T1=1.68	SAT TT=1.646 T1=1.63	SAT TT=0.015 T1=0.01
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga14_13_sat_pb.cnf.cr.opb	SAT TT=0.004 T1=0	SAT TT=2.887 T1=3.24	SAT TT=0.009 T1=0.01	SAT TT=0.009 T1=0	SAT TT=0.095 T1=0.09	SAT TT=0.081 T1=0.07	SAT TT=0.064 T1=0.05	SAT TT=238.31 T1=238.33	SAT TT=0.009 T1=0	SAT TT=4.711 T1=2.47	SAT TT=2.672 T1=1.45	SAT TT=1.136 T1=0.7	SAT TT=1.069 T1=1.06	SAT TT=0.315 T1=0.3	SAT TT=1 T1=0.99	SAT TT=0.908 T1=0.89	SAT TT=0.004 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga14_14_sat_pb.cnf.cr.opb	SAT TT=0.009 T1=0	SAT TT=8.582 T1=8.28	SAT TT=0.013 T1=0.01	SAT TT=0.026 T1=0.02	SAT TT=0.077 T1=0.07	SAT TT=0.09 T1=0.08	SAT TT=0.059 T1=0.05	SAT TT=515.474 T1=515.56	SAT TT=0.009 T1=0	SAT TT=1.728 T1=0.78	SAT TT=2.461 T1=1.4	SAT TT=1.17 T1=0.68	SAT TT=1.292 T1=1.28	SAT TT=0.292 T1=0.28	SAT TT=1.313 T1=1.3	SAT TT=1.197 T1=1.18	SAT TT=0.012 T1=0.01
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga15_13_sat_pb.cnf.cr.opb	SAT TT=0.005 T1=0	SAT TT=65.803 T1=62.61	SAT TT=0.01 T1=0	SAT TT=0.01 T1=0	SAT TT=0.091 T1=0.08	SAT TT=0.273 T1=0.26	SAT TT=0.47 T1=0.46	SAT TT=1616.67 T1=1617.24	SAT TT=0.01 T1=0	? (TO) TT=1800.27	SAT TT=2.012 T1=1.4	SAT TT=1.107 T1=0.62	SAT TT=1.956 T1=1.94	SAT TT=0.283 T1=0.27	SAT TT=2.542 T1=2.53	SAT TT=2.447 T1=2.43	SAT TT=0.005 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga15_14_sat_pb.cnf.cr.opb	SAT TT=0.005 T1=0	SAT TT=37.848 T1=36.14	SAT TT=0.013 T1=0.01	SAT TT=0.012 T1=0.01	SAT TT=0.087 T1=0.08	SAT TT=0.104 T1=0.09	SAT TT=0.103 T1=0.09	SAT TT=1741.61 T1=1742.11	SAT TT=0.01 T1=0	SAT TT=1.374 T1=0.78	SAT TT=2.303 T1=1.41	SAT TT=1.297 T1=0.71	SAT TT=1.428 T1=1.41	SAT TT=0.078 T1=0.07	SAT TT=1.691 T1=1.68	SAT TT=1.653 T1=1.64	SAT TT=0.005 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga15_15_sat_pb.cnf.cr.opb	SAT TT=0.01 T1=0	SAT TT=5.63 T1=5.78	SAT TT=0.014 T1=0.01	SAT TT=0.021 T1=0.02	SAT TT=0.093 T1=0.09	SAT TT=0.082 T1=0.07	SAT TT=0.081 T1=0.07	SAT TT=212.125 T1=212.14	SAT TT=0.01 T1=0	SAT TT=5.514 T1=3.12	SAT TT=2.451 T1=1.42	SAT TT=1.239 T1=0.7	SAT TT=0.789 T1=0.77	SAT TT=0.301 T1=0.29	SAT TT=0.565 T1=0.55	SAT TT=0.554 T1=0.54	SAT TT=0.012 T1=0.01
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga20_18_sat_pb.cnf.cr.opb	SAT TT=0.012 T1=0.01	SAT TT=65.557 T1=62.23	SAT TT=0.032 T1=0.03	SAT TT=5.228 T1=5.22	SAT TT=0.335 T1=0.33	SAT TT=0.448 T1=0.43	SAT TT=0.269 T1=0.25	? (TO) TT=1800.03	SAT TT=0.012 T1=0.01	? (TO) TT=1800.21	SAT TT=2.912 T1=1.52	SAT TT=1.514 T1=0.84	SAT TT=3.251 T1=3.23	SAT TT=1.805 T1=1.79	SAT TT=792.581 T1=792.79	SAT TT=769.156 T1=769.33	SAT TT=0.028 T1=0.02
Bench name	Best results	borg-pb 10.05.30 (complete)	bsolo 3.2 Card (complete)	bsolo 3.2 Cl (complete)	pb_cplex 2010-06-29 (complete)	PB/CT 0.1 (complete)	PB/CT 0.1 fixed (complete)	PBPASSolver 2010-06-13 (complete)	PB-wave alpha 2 (incomplete)	SAT4J PB CuttingPlanes 2.2.0 2010-05-26 (complete)	SAT4J PB RES // CP 2.2.0 2010-05-31 (complete)	SAT4J PB Resolution 2.2.0 2010-05-26 (complete)	SCIPclp SCIP 1.2.1.2 with Clp 1.11.1 (Release Version) as LP solver (complete)	SCIPnone SCIP 1.2.1.2 without any LP solver (complete)	SCIPspx SCIP 1.2.1.2 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	SCIPspx SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	wbo 1.4a (complete)
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga20_19_sat_pb.cnf.cr.opb	SAT TT=0.01 T1=0	SAT TT=66.603 T1=63.02	SAT TT=0.024 T1=0.02	SAT TT=0.024 T1=0.02	SAT TT=0.23 T1=0.22	SAT TT=0.121 T1=0.1	SAT TT=0.219 T1=0.19	? (TO) TT=1800.1	SAT TT=0.013 T1=0.01	SAT TT=49.89 T1=46.72	SAT TT=3.483 T1=2.97	SAT TT=1.617 T1=0.89	SAT TT=4.379 T1=4.36	SAT TT=1.576 T1=1.56	SAT TT=3.799 T1=3.78	SAT TT=3.703 T1=3.69	SAT TT=0.01 T1=0
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga20_20_sat_pb.cnf.cr.opb	SAT TT=0.011 T1=0.01	SAT TT=65.384 T1=62.58	SAT TT=0.028 T1=0.02	SAT TT=0.025 T1=0.02	SAT TT=0.242 T1=0.24	SAT TT=0.135 T1=0.11	SAT TT=0.189 T1=0.16	? (TO) TT=1800.1	SAT TT=0.012 T1=0.01	SAT TT=15.562 T1=11.45	SAT TT=3.315 T1=2.61	SAT TT=1.407 T1=0.91	SAT TT=4.193 T1=4.18	SAT TT=1.238 T1=1.22	SAT TT=4.497 T1=4.5	SAT TT=4.399 T1=4.38	SAT TT=0.011 T1=0.01
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga25_23_sat_pb.cnf.cr.opb	SAT TT=0.016 T1=0.01	SAT TT=73.097 T1=69.12	SAT TT=1.191 T1=1.19	SAT TT=155.45 T1=155.5	SAT TT=0.444 T1=0.44	SAT TT=0.759 T1=0.72	SAT TT=0.247 T1=0.21	? (TO) TT=1800.09	SAT TT=0.016 T1=0.01	? (TO) TT=1800.15	SAT TT=2.461 T1=1.99	SAT TT=1.751 T1=1.02	SAT TT=12.778 T1=12.76	SAT TT=4.126 T1=4.11	SAT TT=16.877 T1=16.89	SAT TT=16.56 T1=16.54	SAT TT=6.741 T1=6.74
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga25_24_sat_pb.cnf.cr.opb	SAT TT=0.017 T1=0.01	SAT TT=65.433 T1=62.29	SAT TT=0.852 T1=0.85	SAT TT=0.092 T1=0.09	SAT TT=0.59 T1=0.58	SAT TT=0.264 T1=0.22	SAT TT=0.336 T1=0.29	? (TO) TT=1800.04	SAT TT=0.017 T1=0.01	SAT TT=1067.05 T1=1056.68	SAT TT=2.968 T1=1.69	SAT TT=2.093 T1=1.19	SAT TT=34.887 T1=17.48	SAT TT=5.437 T1=5.42	SAT TT=23.852 T1=23.84	SAT TT=23.192 T1=23.18	SAT TT=0.047 T1=0.04
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga25_25_sat_pb.cnf.cr.opb	SAT TT=0.017 T1=0.01	SAT TT=65.579 T1=62.65	SAT TT=0.063 T1=0.06	SAT TT=0.105 T1=0.1	SAT TT=0.59 T1=0.58	SAT TT=0.335 T1=0.29	SAT TT=0.302 T1=0.26	? (TO) TT=1800.09	SAT TT=0.017 T1=0.01	SAT TT=437.915 T1=430.96	SAT TT=4.237 T1=2.67	SAT TT=2.348 T1=1.32	SAT TT=9.378 T1=9.37	SAT TT=5.202 T1=5.19	SAT TT=8.616 T1=8.61	SAT TT=8.481 T1=8.46	SAT TT=0.049 T1=0.04
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga30_28_sat_pb.cnf.cr.opb	SAT TT=0.022 T1=0.02	SAT TT=66.239 T1=62.05	SAT TT=0.081 T1=0.07	SAT TT=0.079 T1=0.07	SAT TT=1.389 T1=1.38	SAT TT=3.968 T1=3.91	SAT TT=1.942 T1=1.88	? (TO) TT=1800.09	SAT TT=0.022 T1=0.02	? (TO) TT=1800.19	SAT TT=13.856 T1=7.78	SAT TT=6.344 T1=4.82	SAT TT=29.381 T1=29.36	SAT TT=27.724 T1=27.71	? (TO) TT=1800.19	? TT=1789.58	SAT TT=0.024 T1=0.02
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga30_29_sat_pb.cnf.cr.opb	SAT TT=0.023 T1=0.02	SAT TT=65.389 T1=62.57	SAT TT=0.306 T1=0.3	SAT TT=0.144 T1=0.14	SAT TT=1.906 T1=1.9	SAT TT=0.544 T1=0.48	SAT TT=0.562 T1=0.5	? (TO) TT=1800.03	SAT TT=0.023 T1=0.02	? (TO) TT=1800.19	SAT TT=7.263 T1=4.79	SAT TT=2.282 T1=1.53	SAT TT=29.373 T1=29.35	SAT TT=25.115 T1=25.1	SAT TT=34.969 T1=34.96	SAT TT=31.802 T1=31.79	SAT TT=0.065 T1=0.06
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga30_30_sat_pb.cnf.cr.opb	SAT TT=0.023 T1=0.02	SAT TT=65.718 T1=62.76	SAT TT=0.092 T1=0.09	SAT TT=0.093 T1=0.09	SAT TT=1.451 T1=1.44	SAT TT=0.494 T1=0.43	SAT TT=0.456 T1=0.39	? (TO) TT=1800.02	SAT TT=0.023 T1=0.02	SAT TT=15.998 T1=12.4	SAT TT=4.113 T1=2.9	SAT TT=2.106 T1=1.34	SAT TT=11.575 T1=11.55	SAT TT=20.537 T1=20.52	SAT TT=29.769 T1=29.75	SAT TT=29.157 T1=29.14	SAT TT=0.025 T1=0.02
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga35_33_sat_pb.cnf.cr.opb	SAT TT=0.03 T1=0.02	SAT TT=608.452 T1=574.82	SAT TT=1.187 T1=1.18	SAT TT=0.172 T1=0.17	SAT TT=2.03 T1=2.02	SAT TT=11.147 T1=11.08	SAT TT=1.793 T1=1.72	? (TO) TT=1800.05	SAT TT=0.03 T1=0.02	? (TO) TT=1800.14	SAT TT=31.05 T1=16.23	SAT TT=14.979 T1=13.7	SAT TT=38.32 T1=38.3	SAT TT=50.234 T1=50.22	SAT TT=44.162 T1=44.14	SAT TT=42.587 T1=42.58	SAT TT=136.25 T1=136.27
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga35_34_sat_pb.cnf.cr.opb	SAT TT=0.031 T1=0.03	SAT TT=65.671 T1=62.34	SAT TT=0.155 T1=0.15	SAT TT=0.154 T1=0.15	SAT TT=2.686 T1=2.68	SAT TT=0.501 T1=0.43	SAT TT=0.492 T1=0.42	? (TO) TT=1800.01	SAT TT=0.031 T1=0.03	? (TO) TT=1800.18	SAT TT=6.991 T1=3.92	SAT TT=2.894 T1=1.69	SAT TT=21.304 T1=21.28	SAT TT=68.021 T1=68.01	SAT TT=250.078 T1=250.12	SAT TT=233.023 T1=233.08	SAT TT=0.038 T1=0.03
Bench name	Best results	borg-pb 10.05.30 (complete)	bsolo 3.2 Card (complete)	bsolo 3.2 Cl (complete)	pb_cplex 2010-06-29 (complete)	PB/CT 0.1 (complete)	PB/CT 0.1 fixed (complete)	PBPASSolver 2010-06-13 (complete)	PB-wave alpha 2 (incomplete)	SAT4J PB CuttingPlanes 2.2.0 2010-05-26 (complete)	SAT4J PB RES // CP 2.2.0 2010-05-31 (complete)	SAT4J PB Resolution 2.2.0 2010-05-26 (complete)	SCIPclp SCIP 1.2.1.2 with Clp 1.11.1 (Release Version) as LP solver (complete)	SCIPnone SCIP 1.2.1.2 without any LP solver (complete)	SCIPspx SCIP 1.2.1.2 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	SCIPspx SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	wbo 1.4a (complete)
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga35_35_sat_pb.cnf.cr.opb	SAT TT=0.032 T1=0.03	SAT TT=65.536 T1=62.65	SAT TT=0.205 T1=0.2	SAT TT=0.211 T1=0.21	SAT TT=4.938 T1=4.93	SAT TT=1.308 T1=1.23	SAT TT=1.272 T1=1.2	? (TO) TT=1800.03	SAT TT=0.032 T1=0.03	SAT TT=1283.27 T1=1270.8	SAT TT=6.395 T1=3.95	SAT TT=2.88 T1=1.6	SAT TT=28.873 T1=28.85	SAT TT=72.784 T1=72.79	SAT TT=49.502 T1=49.5	SAT TT=48.375 T1=48.35	SAT TT=0.06 T1=0.05
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga40_38_sat_pb.cnf.cr.opb	SAT TT=0.041 T1=0.04	SAT TT=65.981 T1=62.66	SAT TT=0.243 T1=0.24	SAT TT=0.248 T1=0.24	SAT TT=3.875 T1=3.87	SAT TT=28.22 T1=28.13	SAT TT=2.657 T1=2.56	? (TO) TT=1800.1	SAT TT=0.041 T1=0.04	? (TO) TT=1800.15	SAT TT=6.471 T1=4.04	SAT TT=2.815 T1=1.56	SAT TT=39.369 T1=39.35	SAT TT=204.84 T1=204.87	SAT TT=62.316 T1=62.29	SAT TT=59.771 T1=59.76	SAT TT=0.055 T1=0.05
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga40_39_sat_pb.cnf.cr.opb	SAT TT=0.042 T1=0.04	SAT TT=70.214 T1=66.45	SAT TT=0.589 T1=0.58	SAT TT=4.42 T1=4.41	SAT TT=5.307 T1=5.3	SAT TT=1.399 T1=1.3	SAT TT=1.171 T1=1.08	? (TO) TT=1800.03	SAT TT=0.042 T1=0.04	? (TO) TT=1800.23	SAT TT=5.892 T1=4.03	SAT TT=3.063 T1=1.73	SAT TT=37.528 T1=37.5	SAT TT=178.174 T1=178.2	? (TO) TT=1800.16	? TT=1789.6	SAT TT=3.308 T1=3.3
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga40_40_sat_pb.cnf.cr.opb	SAT TT=0.044 T1=0.04	SAT TT=66.439 T1=62.72	SAT TT=0.33 T1=0.32	SAT TT=0.324 T1=0.32	SAT TT=7.069 T1=7.06	SAT TT=0.842 T1=0.75	SAT TT=2.866 T1=2.77	? (TO) TT=1800.01	SAT TT=0.044 T1=0.04	SAT TT=8.307 T1=5.62	SAT TT=5.869 T1=3.19	SAT TT=2.967 T1=1.67	? (TO) TT=1800.19	SAT TT=248.688 T1=248.75	? (TO) TT=1800.17	? TT=1789.53	SAT TT=0.134 T1=0.13
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga45_43_sat_pb.cnf.cr.opb	SAT TT=0.057 T1=0.05	SAT TT=66.257 T1=62.75	SAT TT=0.525 T1=0.52	SAT TT=0.414 T1=0.41	SAT TT=9.863 T1=9.85	SAT TT=12.34 T1=12.22	SAT TT=7.873 T1=7.75	? (TO) TT=1800.03	SAT TT=0.057 T1=0.05	? (TO) TT=1800.18	SAT TT=30.639 T1=16.18	SAT TT=14.427 T1=13.45	SAT TT=62.501 T1=62.48	SAT TT=545.775 T1=545.89	SAT TT=81.752 T1=81.74	SAT TT=79.208 T1=79.17	SAT TT=0.127 T1=0.12
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga45_44_sat_pb.cnf.cr.opb	SAT TT=0.053 T1=0.05	SAT TT=90.599 T1=86.02	SAT TT=0.671 T1=0.66	SAT TT=0.459 T1=0.45	SAT TT=7.723 T1=7.71	SAT TT=1.453 T1=1.33	SAT TT=2.617 T1=2.49	? (TO) TT=1800.1	SAT TT=0.053 T1=0.05	? (TO) TT=1800.19	SAT TT=13.692 T1=10.05	SAT TT=3.815 T1=2.49	? (TO) TT=1800.12	SAT TT=447.376 T1=447.51	SAT TT=86.831 T1=86.82	SAT TT=83.896 T1=83.86	SAT TT=25.101 T1=25.1
normalized-PB06/SATUNSAT-SMALLINT/ submitted-PB05/aloul/FPGA_SAT05/ normalized-fpga45_45_sat_pb.cnf.cr.opb	SAT TT=0.058 T1=0.05	SAT TT=66.136 T1=62.31	SAT TT=0.819 T1=0.81	SAT TT=0.602 T1=0.6	SAT TT=10.92 T1=10.91	SAT TT=1.7 T1=1.57	SAT TT=1.946 T1=1.82	? (TO) TT=1800.03	SAT TT=0.058 T1=0.05	? (TO) TT=1800.21	SAT TT=5.29 T1=3.02	SAT TT=3.174 T1=1.91	SAT TT=64.226 T1=64.19	SAT TT=587.238 T1=587.38	SAT TT=82.101 T1=82.06	SAT TT=79.473 T1=79.44	SAT TT=0.178 T1=0.17

Statistics		borg-pb 10.05.30 (complete)	bsolo 3.2 Card (complete)	bsolo 3.2 Cl (complete)	pb_cplex 2010-06-29 (complete)	PB/CT 0.1 (complete)	PB/CT 0.1 fixed (complete)	PBPASSolver 2010-06-13 (complete)	PB-wave alpha 2 (incomplete)	SAT4J PB CuttingPlanes 2.2.0 2010-05-26 (complete)	SAT4J PB RES // CP 2.2.0 2010-05-31 (complete)	SAT4J PB Resolution 2.2.0 2010-05-26 (complete)	SCIPclp SCIP 1.2.1.2 with Clp 1.11.1 (Release Version) as LP solver (complete)	SCIPnone SCIP 1.2.1.2 without any LP solver (complete)	SCIPspx SCIP 1.2.1.2 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	SCIPspx SCIP 1.2.1.3 with SoPlex 1.4.2 (CVS Version 30.5.2010) as LP solver (complete)	wbo 1.4a (complete)
Number of times the solver is able to give the best known answer		56	57	38	57	0	38	0	36	45	57	37	55	36	54	54	39
Number of times the solver is the best solver from a complete solver point of view (i.e. best known answer and best TT time)		0	9	0	8	0	0	0	21	0	0	0	0	0	0	5	15